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Molybdenite Moves From Potential Silicon Replacement to a Transistor Prototype

You may recall my coverage at the beginning of the year of work conducted by researchers at Ecole Polytechnique Federale de Lausanne’s (EPFL) Laboratory of Nanoscale Electronics and Structures (LANES) in using “the humble and abundant mineral molybdenite (MoS2) as an attractive alternative to silicon as a two-dimensional material (like graphene is) for replacing the three-dimensional silicon in transistors.”

Well, after publishing at the beginning of the year on the mere potential for molybdenite, the researchers have just published in the journal ACS Nano on their success at building a prototype transistor using the mineral.

In a press release prepared by EPFL, Andras Kis, the director of LANES, explains, “We have built an initial prototype, putting from two to six serial transistors in place, and shown that basic binary logic operations were possible, which proves that we can make a larger chip.”

With silicon it has not proven possible to reduce its thickness below two nanometers “because of the risk of initiating a chemical reaction that would oxidize the surface and compromise its electronic properties.” Molybdenite offers the ability to reduce the thickness of layers down to just three atoms. This translates into a reduction in size of nearly three times.

“The main advantage of MoS2 is that it allows us to reduce the size of transistors, and thus to further miniaturize them,” explains Kis.

It would also seem that molybdenite combines the 2D qualities of graphene with the inherent band gap of silicon.

The researchers still seem intent on downplaying molybdenite’s possible role as competitor to graphene, but I for one am not entirely convinced by the argument of it merely being a complement to graphene.

Nonetheless, back at the beginning of the year “applications that require thin transparent semiconductors, such as optoelectronics and energy harvesting” were highlighted, and now those applications have been somewhat expanded to include “…flexible electronics, such as eventually in the design of flexible sheets of chips.”

IEEE Meeting Plays Host to the Nanomaterials that Aim to Displace Silicon

The place to be this first week of December, if you follow nanotechnology in electronics, is at the IEEE International Electron Devices Meeting (IEDM) in Washington, DC. Hopefully with better planning on my part I can find myself at next year’s meeting.

The news from this year’s event has contained some real eye-openers. Intriguingly, at least some of the news centers around research that is a reaction to Intel’s introduction of its 3D 22-nm Tri-Gate transistor.

In collaborative research between Purdue and Harvard Universities,  researchers are looking into new materials for these 3D chips that will improve electron mobility in these devices and enable the further advancement of this 3D approach.

The researchers are focusing their search on III-V materials, in particular, indium-gallium-arsenide, with which they will make nanowires.

"Industry and academia are racing to develop transistors from the III-V materials," said Pied “Peter” Ye, a professor of electrical and computer engineering at Purdue in the story that covers this research for the university news service. "Here, we have made the world's first 3-D gate-all-around transistor on much higher-mobility material than silicon, the indium-gallium-arsenide."

According to Ye, as the 3D Tri-Gate transistor moves from its current gate length down to 14nm by 2015, silicon will not be able perform. However, Ye believes that nanowires made from III-V materials will get us to the 10nm range.

There’s another approach from the IEDM that is aiming at the 10nm threshold that also has been getting a lot of coverage. Publications from the New York Times to the Wall Street Journal have devoted pixels this week to the work IBM is doing with using carbon nanotubes to create transistors that should keep them performing at and below the 10nm threshold.

The IBM researchers reported at the IEDM on their work at making “the first transistor with sub-10 nm channel lengths, outperforming the best competing silicon-based devices at these length scales.”

According to the IBM press release that went out at the time of the IEDM presentation: “…this breakthrough demonstrates for the first time that carbon nanotubes can provide excellent off-state behavior in extremely scaled devices-- better than what some theoretical estimates of tunneling current suggested.”

IBM’s work with carbon nanotubes here was also accompanied with more reports on the company’s use of graphene to create a CMOS-compatible device for wireless communications.

It would seem that IBM continues to vigorously pursue both graphene and carbon nanotubes to realize the merciless demands of Moore’s Law.

How ever the graphene vs. carbon nanotubes story ultimately plays out, one thing is becoming clear that architecture alone is not going to guide electronics below 10nm and replacing silicon will be required. We'll just have to see which of the nanomaterials wins the day.

"Egg-Carton" Solution to Improving Efficiency of Quantum Dots

The quantum dot has been held out as a potential game-changer in the field solid-state lighting for some time now.

However, if one were to offer a possible knock against quantum dot-based devices in this area, it could be at their lack of efficiency. What happens is that current flow escapes between the quantum dots (QD) in a QD layer rather than through the QDs themselves.

To combat this researchers at Harvard University have developed an atomic layer deposition process that deposits the QDs in a single layer along with an aluminum oxide (Al2O3) insulating layer.  According to Edward Likovich, the best metaphor for the new arrangement is that of a carton of eggs, with the eggs being the QDs.

“The process provides a mechanical and energetic barrier between adjacent quantum dots, so the current tends to flow perpendicularly as opposed to being dissipated among dots in the layer,” says Likovich in the Material Research Society article linked to above. “Also, because we have this mechanical barrier between the dots, we can do post-processing to remove the ligands while holding the dots in place, preventing agglomeration.”

The research, which was published in the journal Advanced Materials, essentially fills the interstices between the QDs with the insulating aluminum oxide forcing the current to flow through the QDs and thereby increasing the light-emission yield.

It will be interesting to see if this process will have an impact on the application of QDs in the areas of LEDs or in photovoltaics.

How Exploratory Engineering Will Lead to Future Nanotechnologies

There is no one more convincing or credible on the subject of advanced nanotechnologies than Eric Drexler.

Not surprisingly since the publishing of his works Engines of Creation and later Nanosystems—which together launched the concept of advanced nanotechnologies—the author has not always shared the views of his colleagues and acolytes.  And while attempting to clarify his views on molecular manufacturing, he has also been hard at work at establishing a roadmap for atomically precise manufacturing (APM), which when it was being formulated acknowledged that it may only be feasibly realized by abandoning the notion of universal assemblers.

With the APM roadmap published, it would seem that Dr. Drexler has taken up a new a book project that we get a glimpse into in the hour-long lecture he recently gave to inaugurate the new Oxford Martin Programme on the Impacts of Future Technology.

In the lecture he gives himself the charge of developing a new kind of predictive mechanism for determining where the future of technology, and, in particular, nanotechnology will take us. Dr. Drexler provides us with an intriguing methodology that fundamentally depends on looking at how the laws of physics determine future engineering.

He further outlines the concept of “exploratory engineering”, which one could see as a hybrid of sorts between science and engineering. To give you an example of how exploratory engineering diverges from the conventional variety, in conventional engineering the basic constraint is manufacturing while in exploratory engineering it’s valid modeling.

In predicting technological change, a great deal of energy is always expended determining when the change will occur. As Dr. Drexler explains near the end of the lecture, this is where the methodology needs to abandon physics and get into the far more problematic field of human behavior.

Despite this indeterminate variable, Dr. Drexler remains optimistic that the potential of advanced nanotechnologies for addressing issues like climate change (you’ll have to watch the video) remains within our grasp given the right dose of will.

New Osmotic-based Process Enables Easier Production of Nanoporous Materials

Researchers at the University of Cambridge’s Cavendish Laboratory in the UK have developed a method for creating nanoporous materials that allows for minor components used in the manufacturing process to remain encapsulated in the material and still be porous.

This method provides a far more flexible method than what had been employed up till now. In the now old method when the minor component was removed to leave behind the pores it was necessary that the component had to be connected both throughout the material and to the outside of the material.

The research, which was led by Dr Easan Sivaniah and published in the journal Nature Materials, showed that a process called collective osmotic shock (COS) meant that even when the minor component is entirely encapsulated that material is still porous.

"The experiment is rather similar to the classroom demonstration using a balloon containing salty water,” explains Sivaniah in the Cambridge University press release covering the research. “How does one release the salt from the balloon? The answer is to put the balloon in a bath of fresh water. The salt can't leave the balloon but the water can enter, and it does so to reduce the saltiness in the balloon. As more water enters, the balloon swells, and eventually bursts, releasing the salt completely.

"In our experiments, we essentially show this works in materials with these trapped minor components, leading to a series of bursts that connect together and to the outside, releasing the trapped components and leaving an open porous material."

Initial applications appear to be in water filtration systems. While this may not be a groundbreaking application for nanoporous materials it is an area in which there is still an acute need for new and better systems to create clean drinking water.

"It is currently an efficient filter system that could be used in countries with poor access to fresh potable water, or to remove heavy metals and industrial waste products from ground water sources,” says Sivaniah. “Though, with development, we hope it can also be used in making sea-water drinkable using low-tech and low-power routes."

Intriguingly the researchers have been collaborating with other labs in using the material in photonic and optoelectronic applications.

The "White Hat" Status of Nanotechnology

To say that I am ambivalent about the usefulness--or, better put, the point--of public engagement in the development of nanotechnology would be putting it mildly.

It seems that I had better get use to them because they are spreading like wildfire in both the US and Europe.  The blog 20/20 Science has a guest article from Craig Cormick, Manager of Public Awareness and Community Engagement within the National Enabling Technologies Strategy in the Australian Department of Innovation, which gives us a rundown of the different varieties of the species and how they might be improved.

It’s still not quite any clearer to me after reading the piece what is to be gained from any of this public engagement, except perhaps to gainfully employ some social scientists, which is fine with me. But the rash of public engagement exercises don’t really seem to be informing or educating anybody.

Cormick does make a point, which I myself kind of had a hint of some time back, that despite efforts to get people afraid of nanotechnology they typically just shrug and move on. Cormick explains this as being because nanotechnology is a “white hat technology”.

Basically this means that no matter what you say against it people are inclined to ignore the negative and focus on the positive.

I suppose this could be behind the odd practice of tagging on what Tim Harper describes as the “dystopian angle” to stories covering nanotechnology, even when they are bought and paid for by a government attempting to promote the field.

In this case, the UK-based Guardian newspaper has no worries that the audience will ever actually become concerned about nanotechnology, so the journalist can feel free to satisfy his or her need to provide balance by formulating some dystopian fantasy likely informed by the usual suspects when the article's aim was to promote nanotechnology.

Again, I have to ask: Is this the kind of public engagement governments are paying for? In this case, we get your typical false equivalencies seen regularly in the mainstream press, which may help seed division and thereby sell papers, but seems to provide some poor information on the real risks and benefits of nanotechnology.

New Battery Technology Could Provide Large-Scale Energy Storage for the Grid

I, like many others, have been following the work being done by Yi Cui at Stanford University in improving battery technology.

Cui’s work has often aimed at improving Li-ion battery technology, much in the same way researchers at Northwestern University recently have done in getting a silicon-graphene sandwich to act as a more effective anode.

But in his most recent research he has abandoned the use of lithium ions and replaced them with either sodium or potassium ions for his new battery technology.

The result is a battery that Cui and his colleagues claim is able to retain 83% of its charge after 40,000 cycles, which compares more than favorably to Li-ion batteries of 1,000 cycles.

The researchers have been able to develop a cathode material that they can essentially mix in a flask by combining iron with cyanide and then replacing half of the iron with copper then making crystalline nanoparticles from the compound.

There is a weight penalty with this battery technology, which means that it will not be likely powering any laptops or electric vehicles. However, it may be the perfect fit for large-scale energy storage on the electrical grid.

"At a rate of several cycles per day, this electrode would have a good 30 years of useful life on the electrical grid," said Colin Wessells, a graduate student in materials science and engineering who is the lead author of a paper describing the research, published this week in Nature Communications.

"That is a breakthrough in performance – a battery that will keep running for tens of thousands of cycles and never fail," said Cui, who in this case is Wessell's adviser and a coauthor of the paper.

But all is not resolved as of yet. While the researchers have developed this ‘new chemistry’ for the battery, they only have the high-power cathode at this point, so they still need to develop an anode.

Nonetheless the researchers are confident they will develop a material for the anode. If they manage to get that sorted, they may have developed an economical battery for storing energy from solar and wind power so as to avoid sharp drop offs in electricity in the grid.

Silicon-Graphene Sandwich Creates Li-ion Batteries with Ten Times Longer Charge Life

When the media made a big noise about the concept of a flexible phone that was being considered by Nokia and Cambridge University back in 2008, aptly called the Morph, I asked who needs a phone that wraps around my wrist when what I really want is one that can last a decent amount of time before needing to be recharged.

Since then there has been a fair amount of research attempting to improve the venerable lithium-ion (Li-ion) battery.

The latest comes from researchers at Northwestern University, led by Harold H. Kung, who have developed a method  for sandwiching silicon between graphene sheets in the anode of the battery to allow for greater number of lithium atoms in the electrode.

Silicon has been experimented with for replacing the carbon in the anode of Li-ion batteries since they allow more Lithium atoms to be stored per atom of silicon than that of carbon (four lithium atoms for every silicon atom compared to one lithium atom for every six carbon atoms). However, silicon expands and contracts so much during the charging process that it soon loses its charge capacity.

“Now we almost have the best of both worlds,” Kung said. “We have much higher energy density because of the silicon, and the sandwiching reduces the capacity loss caused by the silicon expanding and contracting. Even if the silicon clusters break up, the silicon won’t be lost.”

Kung and his team also came up with a chemical oxidation process to create nanometer scale holes in the graphene sheets so that lithium ions can find a shortcut through the graphene in the anode, which could quicken the charging times by a factor of 10.

The research, which was published in the Wiley journal Advanced Energy Materials,  expects to build on this initial work that was focused on the anode and move to the cathode.

New Sorting Process for Carbon Nanotubes Prepares Them for Flexible Electronics

Researchers attempting to use carbon nanotubes (CNTs) in electronics have faced many obstacles, but perhaps the two most fundamental problems have been: putting them where you want them to go and developing a process that promises a homogeneity of CNTs.

Researchers at the University of California Davis and Stanford University, led by Zhenan Bao, who has been using CNTs for creating pressure sensors for use in an artificial skin, along with the Samsung Advanced Institute of Technology have developed a process by which the semiconducting single-walled carbon nanotubes are separated out from a mixture.

The researchers published their work in the journal Nature Communications.

"Sorting has been a major bottleneck for carbon nanotubes to be viable for practical electronics applications," Bao said. "This work solves the problem of separating the conducting from the semiconducting nanotubes."

The problem has been the conducting variety of CNTs and the semiconducting species have quite different application areas where they excel. This separation process could mean that the semiconducting CNTs can be sorted out and used for transistors and the conducting nanotubes can be used for wires and electrodes.

The method the researchers developed for carrying out this separation involves a polymer that wraps itself around the semiconduting and non-conducting CNTs. While researchers have developed polymers in the past that accomplish this, the problem with those polymers was that they insulated the CNTs and required extensive removal treatments to get the polymer off the CNTs.

This polymer does not need to be removed since it can be used as is as a semiconducting nanotube and polymer ink for use in printable electronics.

It is clear that Bao intends to use the semiconducing nanotube product for her work in flexible electronics.

"I'm especially happy that this polymer can now be used to sort nanotubes," Bao said. "It merges two very important materials together and makes a hybrid material that could be very useful for printed and flexible electronics."

Now that 3D Chips Are Here, What Does the Next Generation Hold?

Now that Intel will definitely be introducing its 22-nm Tri-Gate transistor—referred to as a 3-D chip due its 3-D ridge (or fin, thus the alternative name, FinFET) in which electrons runs through—it seems the era of 3-D chips are here sooner than expected. (Read and watch this interesting interview with Intel Senior Fellow Mark Bohr on how we got to this point.)

With this as its context, Dutch researchers from MESA+ Institute at the University of Twente, University of Eindhoven, ASML company and TNO Institute have developed processes by which they can rapidly fabricate “large 3-D photonic in mono-crystalline silicon using CMOS compatible processes”  that should enable novel fabrication methods for computer chips.

The researchers have published their work in a series of three papers and in the one published by the Journal of Vacuum Science and Technology have been able to fabricate a 3-D nanostructure in silicon by making etch marks on two sides of s wafer.

"There are many advantages of our fabrication route" says Willem Tjerkstra, a researcher at the MESA+ Institute in an interview with Nanowerk. "A complex 3-D structure can be made in only two etching steps, instead of tediously making such a structure by stacking layer-by-layer, as in standard CMOS-compatible fabrication. In our paper, we propose that our method allows the realization of 3-D computer chips that have more functional units concentrated on the same area. We also predict the realization of chips on different sides of liquid channels for microfluidic, or for cooling purposes."

In the two succeeding papers, the researchers described a “3D etch-masking method to realize a complex 3-D periodic array (a crystal structure) of pores in silicon” and then in the third paper observed for the first time the long-predicted phenomenon of the spontaneous emission of light from quantum dots in a 3-D photonic band gap.

It will be interesting to see if techniques such as these find their way into the next generation of 3-D chips when dimensions go down to 14nm and then 10nm.

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Nanoclast

IEEE Spectrum’s nanotechnology blog, featuring news and analysis about the development, applications, and future of science and technology at the nanoscale.

 
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Dexter Johnson
Madrid, Spain
 
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Rachel Courtland
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